Just trying to trigger release #1

Merged
S.D merged 13 commits from develop into master 2020-10-11 18:35:00 +00:00
2 changed files with 41 additions and 18 deletions
Showing only changes of commit 98741356a6 - Show all commits

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@ -5,17 +5,17 @@ import "fmt"
const graphicsBufferSize = 64 * 32 const graphicsBufferSize = 64 * 32
type Chip8 struct { type Chip8 struct {
address_register uint16 addressRegister uint16
beep_timer uint16 beepTimer uint16
draw_required bool drawRequired bool
delay_timer uint16 delayTimer uint16
graphics [graphicsBufferSize]byte graphics [graphicsBufferSize]byte
keys [16]byte keys [16]byte
memory [4096]byte memory [4096]byte
opcode uint16 opcode uint16
pc uint16 pc uint16
registers [16]byte // an array - has a fixed length registers [16]byte // an array - has a fixed length
stack []uint16 // a slice - basically a c++ vector stack []uint16 // a slice - basically a c++ vector
} }
// we can't have const arrays in go // we can't have const arrays in go
@ -60,7 +60,7 @@ func (cpu *Chip8) GetGraphicsBuffer() [graphicsBufferSize]byte {
func (cpu *Chip8) clearDisplay() { func (cpu *Chip8) clearDisplay() {
// fuck it the gc can do the hard work for us // fuck it the gc can do the hard work for us
cpu.graphics = [64 * 32]byte{} cpu.graphics = [64 * 32]byte{}
cpu.draw_required = true cpu.drawRequired = true
} }
// what if there's nothing in the stack? // what if there's nothing in the stack?
@ -153,9 +153,32 @@ func (cpu *Chip8) BitOpsAndMath() {
// Store lsb of reg X in reg F and then shift reg X >> 1 // Store lsb of reg X in reg F and then shift reg X >> 1
cpu.registers[0x0F] = cpu.registers[regX] & 0x01 cpu.registers[0x0F] = cpu.registers[regX] & 0x01
cpu.registers[regX] >>= 1 cpu.registers[regX] >>= 1
case 7:
// 8XY57
// Set register x to X=Y-X (Set VF to 1 when there's a carry and 0 if not)
res := cpu.registers[regY] - cpu.registers[regX]
if res < 0 {
cpu.registers[0x0F] = 0
} else {
cpu.registers[0x0f] = 1
}
cpu.registers[regX] = res & 0xFF
} }
} }
func (cpu *Chip8) SkipIfRegistersNotEqual() {
x, y := (cpu.opcode>>8)&0x0F, (cpu.opcode>>4)&0x0F
if cpu.registers[x] != cpu.registers[y] {
cpu.pc += 2
}
}
func (cpu *Chip8) SetAddressRegister() {
// ANNN
// Sets the address register to NNN
cpu.addressRegister = cpu.opcode & 0x0FFF
}
func main() { func main() {
fmt.Printf("Hello world!\n") fmt.Printf("Hello world!\n")
prog := []byte{1, 2, 3, 4} prog := []byte{1, 2, 3, 4}

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@ -21,8 +21,8 @@ func slicesEqual(x, y []byte) bool {
// Maybe fix // Maybe fix
func TestCreateCPU(t *testing.T) { func TestCreateCPU(t *testing.T) {
prog := []byte{1, 2, 3, 4} prog := []byte{1, 2, 3, 4}
new_cpu := NewCHIP8(prog) newCPU := NewCHIP8(prog)
if !slicesEqual(new_cpu.memory[200:204], prog) { if !slicesEqual(newCPU.memory[200:204], prog) {
t.Errorf("CPU not initalized properly") t.Errorf("CPU not initalized properly")
} }
} }
@ -33,10 +33,10 @@ func TestClearDisplay(t *testing.T) {
cpu.graphics[i] = byte(i % 255) cpu.graphics[i] = byte(i % 255)
} }
cpu.clearDisplay() cpu.clearDisplay()
graphics_array := cpu.GetGraphicsBuffer() graphicsArray := cpu.GetGraphicsBuffer()
graphics_slice := graphics_array[:] graphicsSlice := graphicsArray[:]
empty_slice := make([]byte, len(cpu.graphics)) emptySlice := make([]byte, len(cpu.graphics))
if !slicesEqual(graphics_slice, empty_slice) { if !slicesEqual(graphicsSlice, emptySlice) {
t.Errorf("Graphics buffer not cleared properly") t.Errorf("Graphics buffer not cleared properly")
} }
} }