Accelerated_Wireguard/fpga/general_packages/vhdl/useful_functions_pkg.vhd

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-- This package should cover general useful functions that
-- will see a lot of use in my code but do not fit under
-- any specific umbrella.
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
package useful_functions_pkg is
function extend(input : unsigned; length : natural) return unsigned;
function extend(input : std_logic_vector; length : natural) return std_logic_vector;
function extend(input : std_logic; length : natural) return std_logic_vector;
end package;
package body useful_functions_pkg is
function extend(input : unsigned; length : natural) return unsigned is
variable returned_vector : unsigned(length - 1 downto 0);
begin
if length >= input'length then
returned_vector(returned_vector'high downto input'length) := (others => '0');
returned_vector(input'length - 1 downto 0) := input;
else
returned_vector := input(returned_vector'length - 1 downto 0);
end if;
return returned_vector;
end function extend;
function extend(input : std_logic_vector; length : natural) return std_logic_vector is
variable returned_vector : std_logic_vector(length - 1 downto 0);
begin
if length >= input'length then
returned_vector(returned_vector'high downto input'length) := (others => '0');
returned_vector(input'length - 1 downto 0) := input;
else
returned_vector := input(returned_vector'length - 1 downto 0);
end if;
return returned_vector;
end function extend;
function extend(input : std_logic; length : natural) return std_logic_vector is
variable returned_vector : std_logic_vector(length - 1 downto 0);
begin
if length >= 1 then
returned_vector(length - 1 downto 1) := (others => '0');
returned_vector(0) := input;
end if;
return returned_vector;
end function extend;
end package body;